| Date | November 2017 | Marks available | 1 | Reference code | 17N.1.SL.TZ0.8 |
| Level | SL | Paper | 1 | Time zone | no time zone |
| Command term | State | Question number | 8 | Adapted from | N/A |
Question
The machine instruction cycle is the process by which a program instruction is fetched, decoded, executed and the results are stored.
State where all instructions and data are stored.
Outline the role of the data bus and address bus in this process.
Markscheme
Primary memory / RAM
Award up to [2 max].
Note: there must be explicit reference to both address and data bus
Example 1
Buses are used as physical connections to carry information to the CPU;
The data bus transports data from/to CPU, whereas the address bus the memory address where the data is supposed to go/be.
Example 2
Data bus is a physical connection to transport data from-to CPU to be processed;
Address bus is a physical connection to transport an address of memory storage where data (transported in the data bus) should be read/written;
Note: Award [1] mark, for responses that show some understanding of use of buses in CPU, for address location and data transport without using specialist terminology
Examiners report
Syllabus sections
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18M.1.SL.TZ0.3:
Calculate how many different colours can be represented using two hexadecimal characters.
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21N.1.HL.TZ0.2:
State the hexadecimal representation of the binary number 10001010.
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22M.1.SL.TZ0.8:
Identify one function of a single-user operating system.
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22M.1.SL.TZ0.6:
Draw the truth table for the following logic circuit.
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22M.1.SL.TZ0.7a:
Calculate, showing your working in each case: the binary (base 2) value of the denary (base 10) number: 105.
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22M.1.SL.TZ0.9:
Define the term usability.
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22M.1.SL.TZ0.11:
Explain how cache memory affects system performance.
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21M.1.SL.TZ0.3:
Draw the logic circuit represented by the following truth table.
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22M.1.SL.TZ0.7b:
Calculate, showing your working in each case: the hexadecimal (base 16) value of the denary (base 10) number: 200.
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17N.1.SL.TZ0.5:
Copy and complete the following truth table.
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17N.1.SL.TZ0.11b:
State one advantage of this feature.
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19M.1.SL.TZ0.15c:
Identify two types of general application software that would be installed on the training computers.
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18N.1.SL.TZ0.4:
Construct a logic diagram for the following expression.
NOT A OR (A AND B)
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18N.1.SL.TZ0.8c.i:
State how the data stored in the byte will be represented in hexadecimal.
- 19M.1.SL.TZ0.5: State the hexadecimal equivalent of the following binary number: 11011111
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19M.1.SL.TZ0.6:
Construct the truth table from the following logic circuit.
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18M.1.SL.TZ0.2:
Outline the role of the memory data register in the machine execution cycle.
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17N.1.HL.TZ0.10a:
Describe how a spellchecker checks whether a word in a text file is correctly spelt or not.
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19M.1.SL.TZ0.8:
State the part of the central processing unit (CPU) that is responsible for carrying out calculations.
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19M.1.SL.TZ0.2:
Identify two features of a graphical user interface (GUI).
- 19M.1.SL.TZ0.15b: State the purpose of persistent storage on the computers.
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18M.1.SL.TZ0.4:
Explain the importance of the memory management function of an operating system.
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18M.1.SL.TZ0.5:
Construct a logic diagram for the following Boolean expression.
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21M.1.SL.TZ0.5:
Calculate the denary (base 10) equivalent of the hexadecimal number BF.
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17N.1.SL.TZ0.11a:
Describe how a spellchecker checks whether a word in a text file is correctly spelt or not.
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17N.1.SL.TZ0.11c:
Identify two additional features of a word processing package that could be useful for this office.
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18N.1.SL.TZ0.2a:
Outline what is meant by a database management system.
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18N.1.SL.TZ0.8a.ii:
Outline the function of an operating system in managing primary memory.
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18N.1.SL.TZ0.8c.ii:
State how many integers could be represented in this byte.
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18N.1.SL.TZ0.8d:
Construct a truth table with two input variables. If the input variables are equal the value of the output variable should be True, otherwise it should be False.
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19N.1.SL.TZ0.4b:
State the number of bits used to represent a non-primary colour, such as yellow.
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19M.1.SL.TZ0.15a:
Identify two characteristics of RAM.
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20N.1.SL.TZ0.4c:
Outline the function of the memory address register (MAR).
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19M.1.SL.TZ0.7:
Outline the purpose of the memory address register (MAR) in the central processing unit (CPU).
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21M.1.SL.TZ0.11:
Construct the truth table for the following logic circuit:
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18N.1.SL.TZ0.8a.i:
Distinguish between random access memory (RAM) and read only memory (ROM).
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17N.1.SL.TZ0.8b:
Outline the role of the data bus and address bus in this process.
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19N.1.SL.TZ0.3b:
Explain the purpose of cache memory.
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18N.1.SL.TZ0.8c.iii:
Outline why this byte could not be used to represent characters such as those used in Chinese.
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20N.1.SL.TZ0.8c.ii:
Explain how the operating system ensures that each customer’s data is secure when multiple users are accessing the data at the same time.
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19N.1.SL.TZ0.3a:
State the function of the control unit (CU) in the central processing unit (CPU).
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20N.1.SL.TZ0.4b:
State the part of the central processing unit (CPU) that performs the decoding.
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20N.1.SL.TZ0.8c.i:
State where the customer data is held during the process of modifying their data.
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17N.1.SL.TZ0.11d:
Outline the purpose of one application software package other than a word processing package that could be used in this office.
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17N.1.SL.TZ0.6:
Construct a logic diagram for the Boolean expression
NOT A OR B AND C.
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17N.1.SL.TZ0.9:
Define the term bit.
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20N.1.SL.TZ0.4a:
State where the program is held.
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20N.1.SL.TZ0.6:
Construct a truth table for the following logical expression.
(A XOR B) AND NOT C
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18N.1.SL.TZ0.8b:
Explain the roles of the data bus and the address bus in the machine instruction cycle.
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19N.1.SL.TZ0.4a:
State why hexadecimal numbers are frequently used in computing.
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19N.1.SL.TZ0.4c:
State the maximum number of colours that can be represented in a computer pixel.
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19N.1.SL.TZ0.5:
Copy and complete the following truth table where:
X = A XOR B
Y = A NOR C
Z = X OR NOT Y
